1. Field of the Invention
The present invention relates to a reference voltage generator for generating a reference voltage in a semiconductor integrated circuit.
2. Description of the Related Art
FIG. 2 shows a circuit used in a conventional reference voltage generator. A depletion mode NMOS transistor (D-mode NMOS) 10 is connected to operate as a current source, and supplies a constant current flow into an enhancement mode NMOS transistor (E-mode NMOS) 20 having a diode connection. The constant current generates, across the E-mode NMOS 20, a reference voltage corresponding to the threshold voltage and size of each transistor. In this case, the gate of the D-mode NMOS 10 is doped with N-type impurities, and the gate of the E-mode NMOS 20 is doped with P-type impurities (see, for example, Japanese Published Patent Application 59-200320 (FIG. 2)).
In recent years, electronic devices have become more precise, and ICs for controlling the electronic devices are thus required to be more precise in various aspects. For example, in order to realize higher-precision electric characteristics of an IC, it has been required that a reference voltage generator generate a high-precision reference voltage in the IC even when the temperature changes, that is, temperature characteristics of the reference voltage be flatter.